基于遗传算法的图像边缘信息链表匹配技术

提出了一种基于遗传算法的图像边缘信息链表匹配方法。首先,采用CANNY算子的方法提取图像边缘;然后,将图像边缘信息链表化;最后,基于链表化结果利用遗传算法进行链表匹配。该方法能够减少匹配过程中的计算量,且能实现高效匹配。通过仿真实验,验证了该方法的性能。     

一种VDSL上行链路自适应功率回馈方案

上行链路功率回馈技术(UPBO：upstream power back-off)是VDSL(very high-speed digital subscriber lines)系统中的关键技术，它用于抵消同一电缆中短线对长线引起的严重的远端串扰(FEXT:far-end crosstalk)。文中从功率控制的角度分析了基于迭代注水的自适应UPBO方案，并进行了性能仿真分析。     

Tradeoffs in granularity and parallelization for a Monte Carlo shower simulation code

The EGS4 code, developed at Stanford Linear Accelerator Center, simulates electron-photon cascading phenomena. The original code is inherently sequential: processing one particle at a time. This paper reports on a series of experiments in parallelizing different versions of EGS4. Our parallel experiments were run on a 30-processor Sequent Balance B21 and a 6-processor Symmetry S27. We have considered the following approaches for parallel execution of this application code:

1. (1) Original sequential version modified for parallel processing: 1 processor;

2. (2) Version 1 run multiprocessed: 1 to 29 processors;

3. (3) Sequential version modified for large-grain parallel processing: 1 procssor;

4. (4) Version 3 run using the Sequent Microtasking Library: 1 to 29 processors.

For each approach, we discuss the relative advantages and disadvantages in the areas of coding effort, understandability and portability, as well as performance, and outline a new parallelization approach we are currently pursuing based on Large-Grain Data Flow techniques.     

Banach空间Fuzzy多值隐拟变分包含

在Banach空间中并在不具紧性的条件下，引入和研究了一类fuzzy多值隐拟变分包含及相应的fuzzy隐预解算子方程，借助预解算子技巧，建立了Banach空间中fuzzy多值隐拟变分包含与预解算子方程的等价性，得到了该类fuzzy多值隐拟变分包含的迭代算法与某些解的存在性定理及解的迭代逼近。     

浅谈天馈线电压驻波比对微波电路的影响

天馈线电压驻波比是微波电路运行的重要指标，通过典型事例来阐述天馈线电压驻波比的劣化对微波电路的影响，并根据多年实践经验提出天馈线维护需注意的事项。     

铁电存储器FM3808在TMS320VC5402系统中的应用

FM3808是Ramtron公司生产的新型超低功耗非易失铁电存储器，该器件可支持对存储区的高速读写，并可进行近乎无限次的写入。FM3808内部除具有256kB的存储阵列外还集成了实时时钟和系统监控模块，因而功能十分强大。文中介绍了FM3808的性能特点、内部结构和工作原理，分析了TMS320VC5402 DSP的并行引导装载模式。给出了DSP与FM3808组成的并行引导接口方案。     

一种高并行度的H.264帧内预测器的VLSI设计

分析了帧内预测的17种模式,对于每个4×4大小块的16个像素点的不同模式的预测公式之间的相同运算,采用数字强度缩减的方法去除计算的冗余,提出了一种高并行度的帧内预测器,可以每个时钟周期处理16个像素点的预测值。基于SMIC0.18μm工艺,用verilog对该设计进行了VLSI实现,综合后的电路的关键路径最大时延为10ns,电路规模不超过1.4万门,数据吞吐率可以达到1600Msamples/s。从实现结果来看,与采用可重构方法的设计相比,该设计在相同的并行度下减小了电路面积,简化了控制逻辑。     

硬度匹配对40CrNiMo滚子接触疲劳性能的影响

通过对“软－软”、“中－软”、“中－中”、“中－硬”四组不同硬度匹配的滚子接触疲劳试验得出四条Ｐ－Ｎ曲线。并发现中硬度材料的接触疲劳寿命高于软材料，而当主试样为中硬时，与之相匹配的陪试件硬度越高，主试样的寿命越短，通过分析讨论解释了产生上述现象的原因及其失效机理。     

Delay-insensitive codes — an overview

The problem of delay-insensitive data communication is described. The notion of delay-insensitive code is defined, giving precise conditions under which delay-insensitive data communication is feasible. Examples of these codes are presented and analyzed. It appears that delay-insensitive codes are equivalent with antichains in partially ordered sets and with all unidirectional error-detecting codes. Tom Verhoeff received the B.S. and M.S. degrees in mathematics from Eindhoven University of Technology, The Netherlands, in 1985. He is currently an Assistant Professor at the Department of Mathematics and Computing Science of the same university. His main research interests are parallel computations, especially formalisms for their specification and design, and their implementation as delay-insensitive VLSI circuits.